Generate C/C++ code from state chart models#

Sinelabore’s focus is generating readable, maintainable code from flat or hierarchical UML state machine diagrams. With its distinctive features, the tool fits the needs of embedded real-time and low-power developers working in C or C++ (and other supported languages).

Unlike framework-centric approaches, SinelaboreRT does not lock you into a specific runtime framework. The generated code fits naturally into both bare-metal and RTOS-based architectures.

• By generating code that can be compiled with virtually any compiler, and the ability to integrate with your existing IDE, build process or continuous integration system, the code generator can be quickly integrated into any project. Configuration is stored in a plain text file, which lets you tailor the generated output to your needs.
• Generated code has production-quality. It is based on nested switch/case and if/then/else statements. It is easy to read, understand and debug if needed. The generated code requires no compiler specific tricks except standard language features. This means that if the worst comes to the worst, you can easily change or expand the code by hand.
• Can be used with any 8-, 16- or 32-bit CPUs.
• There is no run-time environment needed like with some other solutions.
• Fits well in different system designs. The code generator does not dictate how you design your system. Therefore it is no problem to use the generated code in the context of a real-time operating system (VxWorks, FreeRTOS, embOS, RTEMS, …) or within an interrupt service routine or in a foreground / background (super loop) system.
• There will be no problems when using static code analyzers. Generated C++ code passes clang-tidy and is C++11 ready (modernize-*). Set configuration parameters accordingly.

Generate code for many backend languages#

For IoT applications where parts of the application are implemented in Java / Python / C# / Lua / Rust / JavaScript / Go or Swift, the code can also be generated in these languages besides C or C++.

This makes it easy to prototype quickly on desktop or cloud backends and then move proven behavior to edge devices without redesigning your logic. Instead of re-implementing state handling by hand for each platform, you model once and keep behavior consistent across gateways, services and firmware. If you are building event-driven IoT systems with frequent feature updates, Sinelabore helps you ship faster while reducing transition and timing bugs.

Pick one backend, generate a small model, compile, and run—you will see the same state logic in code within a short iteration.

Generate C++ code from SysML V2 textual models#

Sinelabore can generate C++ from a SysML V2 textual specification. Besides state machines, it supports parts, attributes, ports, enums, and connections—so you can describe a whole system compactly and simulate it on a C++ baseline.

SysML V2 is a more flexible, powerful revision of SysML. A major advantage is textual modeling, which lowers the barrier to model-based systems engineering: you can author models without a heavyweight GUI toolchain—for example with a Visual Studio Code plugin. Compared with earlier Sinelabore workflows that centred on state machines, the SysML V2 path also emits structural glue code, not only state-machine handlers.

That means you get code for parts and their interactions, which is ideal for mock-ups and executable simulations of a target system early in design.